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Lunar Lake

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Lunar Lake
Launching2024
Designed byIntel
Manufactured by
Fabrication process
Codename(s)
  • LNL
Platform(s)
  • Mobile

Branding
Brand name(s)Core Ultra
GenerationSeries 2

Instructions & Architecture
Instructions setx86
Instructionsx86-64
P-core architectureLion Cove
E-core architectureSkymont

Cores
Core countUp to Up to 8 cores:
  • 4 P-cores
  • 4 E-cores
P-core L0 cache112 KB (per core):
  • 64 KB instructions
  • 48 KB data
P-core L1 cache192 KB (per core)
E-core L1 cache96 KB (per core):
  • 64 KB instructions
  • 32 KB data
P-core L2 cache2.5 MB (per core)
E-core L2 cache4 MB (per cluster)
P-core L3 cache3 MB (per core)

Graphics
Graphics architectureXe2-LPG
(Battlemage)
Execution UnitsUp to 64 EUs
Xe CoresUp to 8 Xe Cores
NPU
ArchitectureNPU 4
TOPS48

Memory Support
TypeLPDDR5X-8533
Memory channels2 channels
Maximum capacityUp to 32 GB

I/O
PCIe supportPCIe 5.0
PCIe lanes8 lanes:

History
PredecessorMeteor Lake
VariantArrow Lake
SuccessorPanther Lake

Lunar Lake is the codename for the upcoming Series 2 Core Ultra processors designed by Intel, set for release in the second half of 2024. It is set to follow on from Meteor Lake which saw Intel move from monolithic silicon to a disaggregated MCM design. Meteor Lake was limited to a mobile release while Arrow Lake includes both socketable deskop and mobile processors.

Background[edit]

On May 24, 2024, details on the Lunar Lake architecture were unveiled during Intel's Computex presentation in Taiwan. SKU names of Lunar Lake processors or details such as clock speeds were not announced.[1]

Architecture[edit]

Lunar Lake is an ultra-low power mobile SoC design. It is a successor to 15W Meteor Lake-U processors while Arrow Lake replaces the midrange 28W Meteor Lake-H processors. Lunar Lake's focus on low power efficiency targets premium ultra-thin laptops and compact mobile designs. Intel said that with Lunar Lake, it aimed to "bust the myth that [x86] can't be as efficient" as ARM.[2]

Process node[edit]

Lunar Lake is the first processor design by Intel where all logic dies are entirely fabricated on external nodes outsourced to TSMC. An analysis by Goldman Sachs indicated that Intel would be spending $5.6 billion in 2024 and $9.7 billion in 2025 outsourcing to TSMC.[3] In March 2024, Intel's chief financial officer admitted during an investment call that the company was "a little bit heavier than we want to be in terms of external wafer manufacturing versus internal".[4] The following month, Intel disclosed that their foundry business made a $7 billion operating loss during 2023.[5]

Tile Node EUV Die size Ref.
Compute tile TSMC N3B Yes Un­known [6]
Platform controller tile TSMC N6 Yes Un­known
Foveros interposer base tile Intel 22FFL No Un­known

Compute tile[edit]

The Compute tile is Lunar Lake's largest tile. It has expanded functions over Meteor Lake's compute tile which solely housed CPU cores and cache. Instead, Lunar Lake's compute tile houses CPU cores and their cache, the GPU and the NPU. The previous generation Meteor Lake used the Intel 4 process on its compute tile while Lunar Lake moves to TSMC's N3B node.[7] N3B is TSMC's first generation 3 nm node with lower yields compared to the updated N3E node. Lunar Lake's compute tile was originally planned to be built on Intel's 18A node.[7] 18A will not debut until 2025 with Panther Lake mobile processors and Clearwater Forest server processors. Lunar Lake shares the same Lion Cove P-core and Skymont E-core architectures with Arrow Lake desktop and mobile processors.

With the Lion Cove P-core Intel claims a 14% IPC uplift on average over Redwood Cove. Simultaneous multithreading (SMT) has been removed from Arrow Lake's Lion Cove P-cores.[8] SMT first made its debut in an Intel desktop processor with the Northwood-based Pentium 4 in 2002. Its removal in Lion Cove marks the first time since then that SMT has been completely removed from a new x86-64 Intel performance-oriented core architecture rather than it simply being disabled in some lower-end Celeron and Pentium SKUs.[a] SMT, or Intel's marketing term HyperThreading, allows a single physical CPU core with 2 threads to execute two tasks simultaneously. In the early 2000s, SMT was a way to add more processing threads to dual and quad-core CPUs while not using too much die space. The removal of SMT allows the physical core die area to be reduced. Increasing the number of processing threads with a greater number of physical cores can compensate for the removal of SMT providing 2 threads per core.[9] Intel's removal of SMT yields a 15% saving in die area and 5% greater performance-per-watt.[10] To counteract the removal of SMT, Intel prioritzed executing more instructions per cycle for high single-threaded performance rather than parallel execution. L2 cache per core for Lion Cove is increased to 2.5MB from Redwood Cove's 2MB. Lunar Lake is able to exercise more granular control over Lion Cove's boost clocks. Lion Cove's boost clocks are able to increase in increments of 16.67 MHz rather than in 100 MHz increments.[2]

Lunar Lake's cluster of 4 Skymont E-cores exist on a 'Low Power Island' separate from the P-cores. As a result, The E-cores have their own dedicated L3 cache not accessible to the P-cores rather than sitting on a ringbus fabric with P-cores. Intel claims a massive 68% IPC gain in Skymont E-cores over Crestmont.[11] It achieves this with the inclusion of new 8-wide integer ALUs, doubled from Crestmont.

Neural Processing Unit (NPU)[edit]

Lunar Lake's Neural Processing Unit (NPU), which performs AI operations locally, in-silicon rather than in the cloud, has been updated to Intel's "NPU 4" architecture with increased clock speeds. Intel claims that Lunar Lake can achieve a total of 120 TOPS of performance in AI workloads, with 48 TOPS coming from the NPU alone while an additional 67 TOPS come from the GPU and 5 TOPS from the CPU. Lunar Lake's 48 dedicated NPU TOPS meets Microsoft's requirements for laptops in order to be certified as Copilot+ PCs.[12] Microsoft has mandated 40 TOPs on NPU performance in order to run Copilot locally on Windows PCs.[13] For comparison, the NPU in Meteor Lake and Arrow Lake processors is able to output 10 TOPs.[14]

Graphics[edit]

Lunar Lake's GPU features second generation Xe2-LPG cores based on the Battlemage graphics architecture. The Battlemage architecture launched in Lunar Lake mobile processors before discrete Arc desktop graphics cards. It contains 8 Xe2-LPG cores that share an 8MB L2 cache. The graphics tile is able to provide up to 67 TOPS of INT8 compute for AI processing.[15] The display engine has 3 display pipes with HDMI 2.1, DisplayPort 2.1 and a new eDP 1.5 connection.[7]

Platform controller tile[edit]

The small platform controller tile provides security functions and I/O connectivity including Wi-Fi 7, Thunderbolt 4, 4 PCIe 4.0 lanes and 4 PCIe 5.0 lanes. Lunar Lake's platform controller tile uses the same N6 node from TSMC that is used by Meteor Lake and Arrow Lake's SoC tiles.[6] The platform controller tile in Lunar Lake does not feature two dedicated low power E-cores like those in Meteor Lake and Arrow Lake's SoC tile. This change has been attributed to the power efficiency gains from the compute tile moving from the Intel 4 process to TSMC's more advanced N3B node.[16]

Memory[edit]

Lunar Lake features on-package LPDDR5X-8533 memory ranging from 16GB to 32GB capacities.[17] This on-package memory is a similar approach to Apple with its M series SoCs that integrate unified LPDDR memory onto the package beside the CPU silicon.[18] On-package memory allows the CPU to benefit from higher memory bandwidth at lower power and decreased latency as memory is physically close to the CPU. Intel claims that Lunar Lake's on-package memory achieved a reduction of 40% in power consumption and "up to 250 square millimeters" of space.[19] Furthermore, memory that is integrated onto the CPU package means that the overall processor physical footprint in laptops can be reduced as memory does not need to be placed onto a separate motherboard with its own cooling solution. Less complex cooling being required means that Lunar Lake processors can more easily fit in ultra-low power compact mobile solutions. The downside of Lunar Lake's on-package memory is that is not user replaceable or upgradable to higher capacities beyond 32GB with SO-DIMMs.[19] Due to the inclusion of on-package memory, an additional 2 W is added to the TDP of Lunar Lake processors. Lunar Lake processors have a TDP ranging from 17 to 30 W compared to the 15-28 W TDP of Meteor Lake-H processors.

Notes[edit]

  1. ^ SMT was physically present in previous Intel core architectures like Sandy Bridge, Haswell and Skylake but it was disabled in some lower-end Celeron and Pentium SKUs. For example, Coffee Lake's Skylake cores contained SMT but it was disabled in the Core i7-9700K with 8 cores and 8 threads while the Core i9-9900K had 8 cores and 16 threads.

References[edit]

  1. ^ Wilson, Matthew (June 4, 2024). "Computex 2024: Intel reveals Lunar Lake CPU details". KitGuru. Retrieved June 4, 2024.
  2. ^ a b Burek, John (June 4, 2024). "'Lunar Lake' Explained: How Intel's Moonshot Mobile CPUs Will Escalate the AI Wars". PCMag. Retrieved June 4, 2024.
  3. ^ Shilov, Anton (September 3, 2023). "Intel To Spend $9.7 Billion On TSMC Outsourcing In 2025: Goldman Sachs". Tom's Hardware. Retrieved June 4, 2024.
  4. ^ Evanson, Nick (March 11, 2024). "Intel's chief financial officer admits the company is 'heavier than we want to be in terms of external wafer manufacturing'". PC Gamer. Retrieved June 4, 2024.
  5. ^ Bajwa, Arsheeya (April 3, 2024). "Intel slides as foundry business loss spotlights wide gap with rival TSMC". Reuters. Retrieved June 4, 2024.
  6. ^ a b Bonshor, Gavin (June 3, 2024). "Intel Unveils Lunar Lake Architecture: New P and E cores, Xe2-LPG Graphics, New NPU 4 Brings More AI Performance". AnandTech.
  7. ^ a b c Hachman, Mark (June 3, 2024). "Lunar Lake deep-dive: Intel's new laptop CPU is radically different". PCWorld. Retrieved June 4, 2024.
  8. ^ Crider, Michael (June 3, 2024). "Intel ditches hyperthreading for Lunar Lake CPUs". PCWorld. Retrieved June 4, 2024.
  9. ^ Sexton, Michael Justin Allen (March 5, 2024). "Intel Dumping Hyper-Threading in Its Next-Gen Chips? That Could Be a Good Thing". PC Magazine. Retrieved June 4, 2024.
  10. ^ "Intel Lunar Lake Technical Deep Dive - So many Revolutions in One Chip". TechPowerUp. June 4, 2024. Retrieved June 4, 2024.
  11. ^ Alcorn, Paul (June 3, 2024). "Intel unwraps Lunar Lake architecture: Up to 68% IPC gain for E-cores, 16% IPC gain for P-Cores". Tom's Hardware. Retrieved June 4, 2024.
  12. ^ Hardawar, Devindra (June 4, 2024). "Intel officially unveils Lunar Lake, its Copilot+ AI PC chip". Engadget. Retrieved June 4, 2024.
  13. ^ Alcorn, Paul (March 27, 2024). "Intel confirms Microsoft's Copilot AI will soon run locally on PCs, next-gen AI PCs require 40 TOPS of NPU performance". Tom's Hardware. Retrieved June 4, 2024.
  14. ^ Alcorn, Paul (April 9, 2024). "Intel says Lunar Lake will have 100+ TOPS of AI performance — 45 TOPS from the NPU alone meets requirement for next-gen AI PCs". Tom's Hardware. Retrieved June 4, 2024.
  15. ^ Hollister, Sean (June 4, 2024). "This is Lunar Lake — Intel's utterly overhauled AI laptop chip that ditches memory sticks". The Verge. Retrieved June 4, 2024.
  16. ^ "Intel's next-gen "Skymont" efficient core details leak out". VideoCardz. May 30, 2024. Retrieved June 4, 2024.
  17. ^ Norem, Josh (May 16, 2024). "Intel Lunar Lake Mobile Chips to Feature 16GB or 32GB of Embedded Memory". ExtremeTech. Retrieved June 4, 2024.
  18. ^ Shilov, Anton (September 6, 2023). "Intel Demos Meteor Lake CPU with On-Package LPDDR5X". Tom's Hardware.
  19. ^ a b Crider, Michael (June 3, 2024). "Intel's latest laptops get rid of replaceable memory". PCWorld. Retrieved June 4, 2024.
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